A 3.9 compression-ratio Huffman encoding scheme for the large ion collider on 65nm and 130nm CMOS technologies

摘要

A Huffman coding scheme with 3.9 compression ratio for the Large Hadron Collider experiment is proposed. A fully-synthesized scheme draws a small footprint layout of 60??m ?? 60??m in 65nm and 105??m ?? 105??m in 130nm CMOS process. The maximum operation frequencies are 435MHz for 65nm and 333MHz for 130nm, whereas the power consumption is 1.2mW and 1.9mW respectively. The resulting scheme enables a front-end electronics without any loss of data.