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MOS-only circuit design automation

机译:仅限MOS的电路设计自动化

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摘要

This paper presents an approach to automate MOS-Only circuit design under the polynomial regression and surface fitting. The proposed scheme incorporates a unified model, which enables to improve simulation accuracy in standard SPICE and Cadence SPECTRE simulators during the MOS-Only designs. Furthermore, a piecewise polynomial regressive model of transconductance (gm) of the MOS transistors is presented in terms of VDS, channel width (W) and channel length (L) to increase automation efficiency. Exemplary results are given at high frequency operation to validate our model in both Cadence Spectre and LT-Spice as well.
机译:本文提出了一种在多项式回归和表面拟合下自动进行仅MOS电路设计的方法。拟议的方案包含一个统一的模型,该模型可以在仅MOS的设计中提高标准SPICE和Cadence SPECTER仿真器的仿真精度。此外,根据VDS,沟道宽度(W)和沟道长度(L)提出了MOS晶体管跨导(gm)的分段多项式回归模型,以提高自动化效率。在高频操作下给出了示例性结果,以验证我们在Cadence Spectre和LT-Spice中的模型。

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