Design automation techniques for approximation circuits: verification, synthesis and test.

摘要

Finding the optimal energy savings corresponding to different quality constraints is one of the most important driving forces in approximate design, particularly for complex system on chips (SoCs) with multiple Internet protocols (IPs) integrated on edge devices, or energy-limited devices. This book thus presents a novel design flow, including synthesis, formal verification, and design for testing (DFT) as approximation-aware tools and methodologies, and introduces some steps of accuracy evaluation, such as the error metrics of error rate, worst-case error, average-case error, and bit-flip error, to find the best energy reduction related to the error bounds.