A fault injection platform for FPGA-based communication systems

摘要

Field Programmable Gate Arrays (FPGAs) are successful platforms for the implementation of communication systems, due to their potential high throughput and low development costs. In such systems, however, investigating the system's resilience to soft errors is crucial in many scenarios, such as when facing stringent dependability constraints or when operating in radiation-harsh environments. Therefore, in this paper we present a fault injection platform that targets specifically FPGA-based communication systems. The platform operates partially on the device and partially on a host computer, aiming at both flexibility and high performance. A Reed-Solomon decoder is used as a case study to validate the platform, showing its ability to measure metrics that are relevant both for critical systems (e.g., fault sensitivity) as well as for communication systems in general (e.g., bit error rate).