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Low loss inverter circuit based on buck and boost topology

机译:基于降压和升压拓扑的低损耗逆变器电路

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This paper proposed inverter circuit for low power applications that can generate AC output voltage at fundamental output frequency larger than input voltage without need to increase the number of power switches, several isolated DC source or capacitors and transformer. By applying appropriate duty cycle and PWM switching pattern to the circuit, the near sinusoidal output voltage can be realized with voltage harmonic distortion nearly 5% without the use of filter at output terminal. MATLAB/SIMULINK is used to simulate the proposed circuit.
机译:本文提出了一种适用于低功率应用的逆变器电路,该电路可以在基本输出频率上产生比输入电压大的交流输出电压,而无需增加电源开关,几个隔离的直流电源或电容器和变压器的数量。通过在电路上施加适当的占空比和PWM开关模式,可以在电压谐波失真接近5%的情况下实现接近正弦的输出电压,而无需在输出端使用滤波器。 MATLAB / SIMULINK用于仿真所提出的电路。

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