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Automatic design of domain-specific instructions for low-power processors

机译:针对低功率处理器的领域特定指令的自动设计

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This paper explores hardware specialization of low-power processors to improve performance and energy efficiency. Our main contribution is an automated framework that analyzes instruction sequences of applications within a domain at the loop body level and identifies exactly and partially-matching sequences across applications that can become custom instructions. Our framework transforms sequences to a new code abstraction, a Merging Diagram, that improves similarity identification, clusters alike groups of potential custom instructions to effectively reduce the search space, and selects merged custom instructions to efficiently exploit the available customizable area. For a set of 11 media applications, our fast framework generates instructions that significantly improve the energy-delay product and speed-up, achieving more than double the savings as compared to a technique analyzing sequences within basic blocks. This paper shows that partially-matched custom instructions, which do not significantly increase design time, are crucial to achieving higher energy efficiency at limited hardware areas.
机译:本文探讨了低功耗处理器的硬件专业化,以提高性能和能效。我们的主要贡献是一个自动化的框架,该框架可以在循环主体级别分析域内某个应用程序的指令序列,并识别跨应用程序的完全和部分匹配的序列,这些序列可以成为定制指令。我们的框架将序列转换为新的代码抽象,即合并图,可改善相似性识别,将相似的潜在自定义指令集聚在一起以有效减少搜索空间,并选择合并的自定义指令以有效利用可用的可自定义区域。对于一组11种媒体应用程序,我们的快速框架生成的指令可显着改善能量延迟乘积并加快速度,与分析基本块内序列的技术相比,可节省超过一倍的成本。本文表明,部分匹配的自定义指令不会显着增加设计时间,对于在有限的硬件区域实现更高的能效至关重要。

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