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Design, implementation and testing of an integrated active quench circuit compatible with Geiger-mode APD arrays

机译:与盖革模式APD阵列兼容的集成有源淬火电路的设计,实现和测试

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An integrated active quench and reset circuit (AQRC) for accurately controlling the hold-off time in Geigermode avalanche photodiodes (GM-APDs) is designed. The circuit was fabricated using a conventional 0.15 μm CMOS process and evaluated using a packaged GM-APD. Experimental results show that the hold-off time can be precisely varied from nanoseconds to microseconds. This allows for selection of the optimal `afterpulse-free' hold-off time for GM-APDs using digital inputs or additional signal processing circuits. Additionally, the APD is automatically reset following the end of the hold-off period, thus simplifying the control circuit. The circuit was also implemented for a 2 × 2 APD array. Results show that the hold-off time for individual APDs in the arrays can be accurately set via the circuit. The total layout area is about 130 μm × 200 μm using the 0.15 μm CMOS process. The layout area can be reduced further with smaller dimension CMOS processes opening up the possibilities for larger scale integrated photon counting arrays.
机译:设计了一个集成的有源淬灭和复位电路(AQRC),用于精确控制Geigermode雪崩光电二极管(GM-APD)中的保持时间。该电路是使用常规0.15μmCMOS工艺制造的,并使用封装的GM-APD进行了评估。实验结果表明,延迟时间可以精确地从纳秒更改为微秒。这允许使用数字输入或附加信号处理电路为GM-APD选择最佳的“无后脉冲”保持时间。此外,在保持周期结束后,APD会自动复位,从而简化了控制电路。该电路还针对2×2 APD阵列实现。结果表明,可以通过电路准确设置阵列中各个APD的保持时间。使用0.15μmCMOS工艺,总布局面积约为130μm×200μm。使用较小尺寸的CMOS工艺可以进一步减小布局面积,从而为大规模集成光子计数阵列打开了可能性。

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