Design of on-chip linear voltage regulator module and measurement of power distribution network noise fluctuation at high-speed output buffer

摘要

By applying on-chip linear VRM, PDN inductance is greatly decreased and PDN resonance peak disappears, which is usually generated by PCB/PKG inductance and on-chip capacitance. To confirm, we design an application circuits which have on-chip linear voltage regulator module (VRM) with aggressor and victim buffer. We validate the advantages of on-chip linear VRM by measuring fabricated chip in this research. Moreover, we show PDN self-impedance at output buffer by simulation with designed PCB's S-parameter, and eye-diagram power fluctuation up to 1 Gbps.