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Low noise design of a CMOS Gilbert mixer cell in 700 MHz

机译:CMOS Gilbert混频器单元在700 MHz下的低噪声设计

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A design of a MOS Gilbert mixer cell intended for LTE band 28 is presented in this work. The objective is directed to a design with low noise and low third-order intermodulation distortion. The designed mixer can be used in a fully-differential chain, avoiding the implementation of a balun. Since the overall IP3 of a full front-end depends on the IP3 of the each stage, specially those behind the low-noise amplifier (LNA), it is mandatory to have a properly designed mixer. In this design a CMOS 0.18 process is employed. The proposed scheme allows to obtain the following characteristic parameters: an IIP3 of 8.69 dBm, a 1dB-compression point of ¿¿¿1.28 dBm, a noise figure of 8.2 dB and draw 30 mA from a 3.3 V power supply.
机译:这项工作提出了旨在用于LTE频段28的MOS Gilbert混合器单元的设计。目的是针对具有低噪声和低三阶互调失真的设计。设计的混频器可以在全差分链中使用,从而避免了平衡-不平衡变换器的实现。由于完整前端的总体IP3取决于每个级的IP3,尤其是低噪声放大器(LNA)后面的IP3,因此必须具有正确设计的混频器。在此设计中,采用CMOS 0.18工艺。所提出的方案允许获得以下特性参数:8.69 dBm的IIP3、1.28 dBm的1dB压缩点,8.2 dB的噪声系数并从3.3 V电源汲取30 mA的电流。

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