Common-Mode (CM) noise suppression of serializer/deserializer (SERDES) transmitters based on parallel impedance scaled stages (Invited paper)

摘要

The rise/fall time mismatch in a differential signal is responsible for a serious common-mode (CM) issue in high-speed CMOS serializer/deserializer (SERDES) transmitters (Txs). The non-linear parasitic impedance variations of the switching devices and differences in parasitic impedances in the charging and discharging loop produce deterministic spurs on the CM voltage that generate certain spectral tones at twice the Nyquist frequency, causing the electromagnetic compatibility (EMC) failure. The CM radiation is generally more significant than differential-mode (DM) radiation, and therefore suppressing CM noise is essential for improving EMC performance. This paper presents a new circuit design perspective to address the CM noise issue in a source-series terminated (SST) output driver by calibrating parallel impedance scaled SST stages. Simulated in a 65-nm CMOS process, our results indicate that adjusting the MOS devices circumvents the CM noise by more than 65% in the worst case scenario as it affects most of the output CM noise profile.