首页> 外文会议>International Conference on Cloud Computing and Security >Security Against Hardware Trojan Attacks Through a Novel Chaos FSM and Delay Chains Array PUF Based Design Obfuscation Scheme
【24h】

Security Against Hardware Trojan Attacks Through a Novel Chaos FSM and Delay Chains Array PUF Based Design Obfuscation Scheme

机译:通过基于新型混沌FSM和延迟链阵列PUF的设计混淆方案来防范硬件木马攻击

获取原文

摘要

Hardware Trojan has emerged as a major security concern for integrated circuits. This paper presents a novel design obfuscation scheme against hardware Trojan attacks based on chaos finite state machine (FSM) and delay chains array physical unclonable function (PUF). We exploits the pseudo-random characteristics of the M-sequences to propose a chaos FSM design method which can generate exponentially many random states and transitions to obfuscate the chip's functional states with low overhead. The chip's functionalities are locked and obfuscated and would not be functional without a unique key that can only be computed by the designer. We also propose a new PUF construction method, named delay chains array PUF (DAPUF), to extract the unique power-up state for each chip which is corresponding to a unique key sequence. We introduce confusions between delay chains to achieve avalanche effects of the PUF outputs. Thus the proposed DAPUF approach can provide large number of PUF instances with high accuracy and reverse-engineering resistant. Through the proposed obfuscation scheme, the designer can control the IC's operation modes (chaos mode and normal mode) and functionalities, and can also remotely disable the chips when hardware Trojan insertion is revealed. The functional obfuscation prevents the adversary from understanding the real functionalities of the circuit as well as the real rare events in the internal nodes, thus making it difficult for the adversary to insert hard-to-detect Trojans. It also makes the inserted Trojans become invalid since the Trojans are most likely inserted in the chaos mode and will be activated only in the chaos mode. Both simulation experiments on benchmark circuits and hardware evaluations on FPGA show the security, low overhead and practicality of the proposed method.
机译:硬件木马已成为集成电路的主要安全问题。本文提出了一种基于混沌有限状态机(FSM)和延迟链阵列物理不可克隆功能(PUF)的针对硬件特洛伊木马攻击的设计迷惑方案。我们利用M序列的伪随机特性来提出一种混沌FSM设计方法,该方法可以生成指数级的许多随机状态和转换,从而以较低的开销混淆了芯片的功能状态。如果没有只能由设计人员计算的唯一密钥,则芯片的功能将被锁定和混淆,并且无法正常工作。我们还提出了一种新的PUF构造方法,称为延迟链阵列PUF(DAPUF),以为每个芯片提取与唯一键序列相对应的唯一上电状态。我们引入了延迟链之间的混淆,以实现PUF输出的雪崩效应。因此,提出的DAPUF方法可以为大量PUF实例提供高精度和抗逆向工程性。通过提出的混淆方案,设计人员可以控制IC的工作模式(混沌模式和正常模式)和功能,并且在显示硬件特洛伊木马插入时可以远程禁用芯片。功能混淆使对手无法了解电路的实际功能以及内部节点中的罕见事件,从而使对手很难插入难以检测的特洛伊木马。这也使插入的特洛伊木马变得无效,因为特洛伊木马很可能是在混乱模式下插入的,并且仅在混乱模式下才会被激活。在基准电路上的仿真实验以及在FPGA上的硬件评估都表明该方法的安全性,低开销和实用性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号