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Design of hardware efficient modulated filter bank for EEG signals feature extraction

机译:用于脑电信号特征提取的硬件高效调制滤波器组设计

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In this paper, we propose a new efficient design algorithm to synthesize low complexity FIR filters, which has been applied to EEG signals feature extraction filter bank. A prudently defined bit-level frequency response sensitivity function is designed as a measure for the proposed coefficients quantization decision making. The coefficients are synthesized to meet the specifications while addressing the complexity reduction by maximizing common subexpressions sharing with the aid of instant checking and updating of common subepxressions statistics. By this new iterative algorithm, the filter coefficients are quantized into optimal patterns which are favorable for the circuit implementation with significantly reduced area cost. The effectiveness of the proposed design algorithm is demonstrated using two design examples where the proposed design solution saves about 82.6% and 48.5% of hardware complexity over the baseline implementation and other competing methods.
机译:在本文中,我们提出了一种新的高效设计算法来合成低复杂度的FIR滤波器,该算法已被应用于EEG信号特征提取滤波器组。将谨慎定义的比特级频率响应敏感度函数设计为提出的系数量化决策的度量。合成这些系数以满足规范,同时通过即时检查和更新公共子表述统计信息最大化公共子表述来解决复杂性降低问题。通过这种新的迭代算法,滤波器系数被量化为最佳模式,这对于电路实现是有利的,并且面积成本大大降低。通过两个设计示例证明了所提出的设计算法的有效性,其中与基线实现和其他竞争方法相比,所提出的设计解决方案可节省约82.6%和48.5%的硬件复杂性。

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