Auto-identification of positive feedback loops in multi-state vulnerable circuits

摘要

A systematic method is proposed for automatically identifying positive feedback loops (PFLs) in analog/mixed-signal circuits. The method first converts the netlist of a circuit into a directed dependency graph (DDG) which captures the critical relationships among branch currents and node voltages. It then utilizes graph theory techniques to find all feedback loops from the DDG and finally, criterion are developed to determine the PFLs. Since multiple states is caused by the PFLs, this method could identify the circuit's vulnerability to undesigned operating points only by its structure without the computation of DC solutions. The proposed approach is implemented in program and simulation results show it could identify all the PFLs very robustly.