An approach to the ultimate integration and miniaturization of MEMS-based 3-D magnetic components involves embedding the volume of the magnetic structures within the volume of the silicon wafer itself, exploiting microfabricated windings to create current paths, and utilizing embedded magnetic cores within the limited footprint of these components to boost the magnetic performance. However, this embedding approach imposes volumetric and microfabrication constraints that require an unusual magnetic component optimization methodology compared to wire-wound inductors and PCB inductors. These constraints dictate embedded toroidal inductors with non-overlapping windings and thin magnetic cores, and impose additional limitations on inductor design parameters such as pattern resolution, the number of winding turns and winding thickness; these constraints complicate the trade-offs to be made in designing core-integrated inductors. A design methodology encompassing these constraints is therefore needed. For a targeted inductance value within a given footprint, our design methodology addresses an inductor with a maximized quality factor based on the trade-offs between copper loss and core loss. To illustrate this methodology, silicon-embedded inductors with iron powder cores are designed and fabricated; a quality factor of 24 is achieved at 30 MHz.
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