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Improving the Digital Design with Semi-formal Specification

机译:用半形式规格改进数字设计

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In this work, an improvement of the traditional design methodology is proposed. The major change is the use of semi-formal specification for the implementation and the establishment of properties for the formal verification. From semi-formal specification, assertions were written using Property Specification Language (PSL) for an alignment circuit. Finally, a set of properties for the verification of this module were established and proved using two verification tools. Our statistics proved that, considerable design time was saved, and the number of versions was low.
机译:在这项工作中,提出了一种改进传统设计方法。主要变革是利用半正式规范来实施和建立正式验证。从半正式规范中,使用属性规范语言(PSL)写入断言,用于对准电路。最后,建立了一组用于验证此模块的属性,并使用两个验证工具证明。我们的统计数据证明,保存了相当大的设计时间,并且版本的数量很低。

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