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An investigation on FPGA based energy profiling of multi-core embedded architectures

机译:基于FPGA的多核嵌入式架构能量分析研究

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Power and energy profiling of multi-core embedded SoC designs is a daunting task due to the lack of fine grain accurate and high sampling rate monitoring infrastructures. Furthermore, shared components used in common by multiple processing cores, make these designs difficult to analyze consumption of concurrent threads. FPGA development boards are currently used to implement multi-core SoC prototypes in order to validate them on real hardware and to perform thoroughly performance profiling. In this paper, we investigate the capacity of FPGA designs to profile the power consumption and energy usage of multi-core embedded architectures and application benchmarks running on them.
机译:由于缺乏细粒度准确和高采样率监测基础设施,多核嵌入式SOC设计的电力和能量分析是一种艰巨的任务。此外,由多个处理核心共同使用的共享组件使这些设计难以分析并发线程的消耗。 FPGA开发板目前用于实施多核SoC原型,以便在真正的硬件上验证它们,并进行彻底的性能分析。在本文中,我们调查了FPGA设计的能力,以简化运行的多核嵌入式架构和应用基准的功耗和能源使用。

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