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An investigation on FPGA based energy profiling of multi-core embedded architectures

机译:基于FPGA的多核嵌入式架构能量分析研究

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Power and energy profiling of multi-core embedded SoC designs is a daunting task due to the lack of fine grain accurate and high sampling rate monitoring infrastructures. Furthermore, shared components used in common by multiple processing cores, make these designs difficult to analyze consumption of concurrent threads. FPGA development boards are currently used to implement multi-core SoC prototypes in order to validate them on real hardware and to perform thoroughly performance profiling. In this paper, we investigate the capacity of FPGA designs to profile the power consumption and energy usage of multi-core embedded architectures and application benchmarks running on them.
机译:由于缺乏细粒度的精确和高采样率监控基础架构,多核嵌入式SoC设计的电源和能量配置是一项艰巨的任务。此外,多个处理内核共同使用的共享组件使这些设计难以分析并发线程的消耗。 FPGA开发板目前用于实现多核SoC原型,以便在真实的硬件上对其进行验证并进行彻底的性能分析。在本文中,我们研究了FPGA设计的能力,以分析多核嵌入式架构的功耗和能耗以及在其上运行的应用基准。

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