Power Efficient Multimodulus Programmable Frequency Divider with Half-integer Division Ratio Step Size

摘要

A novel half-integer multi-modulus programmable divider was presented in this paper. It is based on the combination of the zipper divider structure and the reversed phase-switching technique (RPST). To solve the unwanted division ratio (DR) decreasing problem which is inevitably introduced by RPST, we can set DR one more than the expected value with smart design of the feedback control block. Also, we adopt a power saving method to reduce the divider's power consumption about 21% on average. The proposed divider can be used in fractional-N frequency synthesizers to suppress the quantization noise with the folded DR step size.