Yield is the single most important criterion which drives the economics of our industry, impacting the bottom line directly. It is a well understood fact that both foundries and fabless companies have an extremely strong interest in achieving high yield as quickly as possible to meet the economies of scale and rapid time to market. At the 28nm node and below, implementation of DFM is believed to be particularly critical to enable a fast yield ramp. Quantification of the yield impact of various DFM enhancements is crucial to drive the appropriate design tradeoffs. In this paper we present an analysis of yield impact of DFM features over the duration of technology and product yield ramp for the 28nm node. Yield has inherent variation due to nature of its dependency on multiple factors and stages which makes it difficult to attribute yield signal to a small action in a long chain of event, from design to fabrication, leading to successful yield. We created a set of designs in 28nm, with and without DFM, where DFM changes were done only opportunistically. After finishing these designs, both the unmodified and the DFM enhanced layouts were placed side by side on the test chip reticles. Both instances got tested over long time for yield evaluation on silicon to create enormous amount of data which we analyzed and present in this paper. For analysis of all this data, we compare different statistical methods to understand the same and present challenges faced using these methods. We conclude with successful application of Matched Pair statistical method that quantified yield sensitivity to the DFM design changes.
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