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mm-Wave pulse-generation circuits in 65nm CMOS

机译:65nm CMOS毫米波脉冲发生电路

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Three mm-wave pulse generation circuits fabricated in a standard 65nm CMOS process are presented. Two versions are based on the cross-coupled NMOS LC-VCO (500um × 300 um), and one is based on the Colpitts VCO (600um × 300 um). No additional buffers are used in the cross-coupled versions, as they are directly loaded by 50 Ohms through a balun. They can produce measured pulses exceeding 8dBm peak output power suitable for impulse radio (IR) systems, and also capable of producing pulses at 6.2pJ/pulse. A drive stage is used in the Colpitts based version to drive 50 Ohm measurement equipment, achieving phase coherent pulses with 8.6pJ/pulse, suitable for pulsed radar applications or IR systems.
机译:介绍了采用标准65nm CMOS工艺制造的三个毫米波脉冲发生电路。两种版本基于交叉耦合的NMOS LC-VCO(500um×300 um),一种基于Colpitts VCO(600um×300 um)。在交叉耦合版本中,无需使用其他缓冲器,因为它们通过平衡-不平衡转换器直接加载了50欧姆。它们可以产生超过8dBm峰值输出功率的测量脉冲,适用于脉冲无线电(IR)系统,并且还能够产生6.2pJ /脉冲的脉冲。在基于Colpitts的版本中使用一个驱动级来驱动50 Ohm测量设备,以8.6pJ / pulse的速度实现相位相干脉冲,适用于脉冲雷达应用或IR系统。

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