Highly sensitive, low-power, 10-20Gb/s transimpedance amplifier based on cascaded CMOS inverter gain stages

摘要

Error-free operation is demonstrated up to 20Gb/s for a TIA consisting of seven cascaded inverter-based gain stages in 40nm (LP) CMOS technology, with a current sensitivity of 70µA and an energy efficiency of 575fJ/b.