CMOS analogue integrated circuits; frequency dividers; microwave integrated circuits; phase locked loops; CML divider; CMOS process; PLL; analog common mode logic divider; digital frequency divider; divider circuit; frequency 8.3 GHz to 13.9 GHz; frequency divider; phase-locked loop; size 65 nm; CMOS integrated circuits; Frequency conversion; Frequency measurement; Noise measurement; Phase locked loops; Phase measurement; Phase noise; CML; CMOS; PLL; frequency divider;
机译:用于毫米波硅基锁相环频率合成器的37 GHz宽带可编程N分频器
机译:用于毫米波硅基锁相环频率合成器的37 GHz宽带可编程N分频器
机译:深亚微米CMOS中的高速,低功率分频器和锁相环的设计
机译:12.6 GHz锁相环的1201:1分频器设计
机译:具有整数分频器的高频应用的低功耗CMOS锁相回路频率合成器
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机译:深亚微米CMOS中的高速,低功率分频器和锁相环的设计