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Analysis and design of fully integrated very low quiescent current LDOs

机译:完全集成极低静态电流LDOS的分析与设计

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We introduce two extremely low quiescent current (IQ) low-dropout (LDO) voltage regulators. The Low IQ-LDO (LIQ-LDO) has a minimum ground current of 13 µA and is designed for a maximum load current of 50 mA. The Micro IQ-LDO (MIQ-LDO) has a minimum ground current of 1.2 µA and is designed for a maximum load current of 5 mA. Detailed pole/zero analysis is performed to aid in the design of the LDOs. Two LHP zeros cancel the two non-dominant poles which extend the bandwidth and improve transient response. Both designs are fully integrated, stabilized with an on-chip capacitive load of 100 pF. A process-independent figure of merit (FOM) is proposed to compare LIQ-LDO and MIQ-LDO with other published work.
机译:我们介绍了两个极低的静态电流(IQ)低丢失(LDO)电压稳压器。低IQ-LDO(LIQ-LDO)的最小接地电流为13μA,设计用于50 mA的最大负载电流。 Micro IQ-LDO(MIQ-LDO)的最小接地电流为1.2μA,设计用于5 mA的最大负载电流。进行详细的杆/零分析以帮助LDO的设计。两个LHP Zeros取消了两个非主导杆,其延伸带宽并提高瞬态响应。这两种设计都完全集成,稳定,配内电容载荷为100pF。提出了一个独立于唯一的优点(FOM)的数字,以比较LIQ-LDO和MIQ-LDO与其他公布的工作。

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