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Convergence-Boosted Graph Partitioning using Maximum Spanning Trees for Iterative Solution of Large Linear Circuits

机译:融合 - 使用最大跨越树木的迭代解的升级图分隔,用于大线性电路的迭代解

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The ability to solve large linear systems efficiently has been a key part of building a successful circuit simulator such as ones for power grid analysis. Partition-based iterative methods have been widely adopted due to their divide-and-conquer nature and amenability to parallel implementation. However such methods rely heavily on the quality of circuit graph partitioning, and it is extremely challenging to develop a robust partitioning scheme that always generates near-optimal results. In this paper, we present a new line of thinking by integrating two rather distinct schools of iterative methods: partitioning based and support graph based. The former enjoys ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree (MST) of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. By combining the two, we propose a, partitioning-based preconditioner based on the theory of support graph. The circuit partitioning is guided by the MST of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partition-based method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over an state-of-the-art direct solver.
机译:有效地解决大线性系统的能力是构建成功电路模拟器的关键部分,例如用于电网分析的成功电路模拟器。由于它们的分歧和征服性质和平行实施的扫描,基于分区的迭代方法已被广泛采用。然而,这种方法严重依赖于电路图分区的质量,并且开发始终产生近最佳结果的强大分区方案是非常具有挑战性的。在本文中,我们通过整合两个相当不同的迭代方法学校提供了一种新的思维方式:基于分区和基于支持图。前者享受易于平行化,然而,缺乏对所产生分区的数度的直接控制。相反,后者在电路图的最大跨度树(MST)上操作,这对于快速数值收敛而优化,但是通过其并行化的难度是瓶颈。通过组合这两个,我们提出了基于支持图理论的基于分区的预处理器。电路分区由底层电路图的MST引导,为实现快速收敛提供基本指导。得到的块 - Jacobi样的预处理器最大化了从支持图理论继承的数值益处,同时向自身借导于基于分区的方法来借给直接的并行化。 IBM电网套件和合成电网基准测试的实验结果表明,我们所提出的方法通过最先进的直接求解器将DC仿真加速高达11.5倍。

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