Mining Message Flows from System-on-Chip Execution Traces

摘要

Comprehensive and well-defined specifications are necessary to perform rigorous and thorough validation of system-on-chip (SoC) designs. Message flows specify how components of an SoC design communicate and coordinate with each other to realize various system functions. They are essential for efficient system-level validation and debug for SoC designs. However, in practice such specifications are usually not available, often ambiguous, incomplete, or even contain errors. This paper addresses that problem by proposing a specification mining framework, FlowMiner, that automatically extracts message flows from SoC execution traces. It also includes inference rules and optimization techniques to improve mining performance and reduce mining complexity. Evaluation of this framework in several experiments shows promising results.