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Anti-resonance peak frequency control by variable on-die capacitance

机译:通过可变导架电容进行防振峰值频率控制

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Power integrity design has been becoming important in the advanced CMOS digital systems, because power supply noise induces logic instability and electromagnetic radiation. Especially, anti-resonance peaks in power distribution network (PDN) due to the chip-package interaction induce the unwanted power supply fluctuation, and result in large electromagnetic radiation. In this paper, power supply noises and total impedances of power distribution network (PDN) for the variable structure of on-die capacitances have been examined. In addition, power supply noise and total PDN impedance have been examined by changing the number of power supply terminals. As a result, it has been proved that anti-resonance peaks could be controlled by on-die capacitance and the number of power supply terminals. Simulated anti-resonance peak frequencies were well correlated with the peak frequency spectra of measured power supply noise.
机译:电力完整性设计在高级CMOS数字系统中一直很重要,因为电源噪声引起逻辑不稳定和电磁辐射。特别地,由于芯片封装的相互作用导致配电网络(PDN)中的反共振峰诱导不需要的电源波动,并导致大电磁辐射。在本文中,研究了对导芯电容的可变结构的电源噪声和功率分配网络(PDN)的总阻抗。另外,通过改变电源端子的数量来检查电源噪声和总PDN阻抗。结果,已经证明,可以通过导芯电容和电源端子的数量来控制防振峰值。模拟的防振峰值峰值与测量电源噪声的峰值频谱良好相关。

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