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Implementation of Convolutional Code Based on FPGA in OFDM-UWB System

机译:基于FPGA在OFDM-UWB系统中的卷积码的实现

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The convolutional code cell is an essential part in a transmitter of Multi-band Orthogonal Frequency Division Multiplexing Ultra Wide Band (MB-OFDM-UWB) system introduced in this paper as a kind of useful channel coding to offer more protection against all kinds of channel noise under indoor channel environments. In this paper, some kinds of convolutional codes for MB-OFDM-UWB system are designed. And then, two different structures for the implementations of convolutional codes are presented respectively. The two different structures of convolutional codes are implemented based on Field Programmable Gate Array (FPGA) chip with the software tools of ISE Foundation and ModelSim. The simulation results show that the performance of parallel structure is better than that of pipe line structure and that it's convenient to implement based on a mother code rate of 1/3 the punctured convolutional code with different code rates that are needed by different modules of the OFDM-UWB system. The implementation of convolutional code technique with FPGA chip can be fit to all kinds of applications of OFDM-UWB system with no transformations.
机译:卷积代码单元是本文中引入的多频段正交频分复用超宽带(MB-OFDM-UWB)系统的发射机中的一个重要组成部分,作为一种有用的信道编码,以便为各种信道提供更多保护室内频道环境下的噪音。在本文中,设计了用于MB-OFDM-UWB系统的某些卷积码。然后,分别呈现用于卷积码的实现的两个不同的结构。卷积码的两个不同结构是基于现场可编程门阵列(FPGA)芯片的实现,其中具有ISE基础和Imexim的软件工具。仿真结果表明,平行结构的性能优于管线结构的性能,并且基于由不同模块所需的不同代码率的穿刺卷积码的母代码率方便实现OFDM-UWB系统。使用FPGA芯片的卷积码技术的实现可以符合OFDM-UWB系统的各种应用,没有变换。

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