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Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs

机译:流水线型ADC的增益和非线性误差的自适应消除

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In switched-capacitor circuits like ΔΣ modulators and pipelined ADCs, accurately transferring voltages in sampled-data form, regardless of opamp gain and nonlinearity, has been one of the most challenging issues that analog designers have faced. To date, it has been difficult to achieve high resolution with pipelined ADCs operating at low voltages due to gain and nonlinearity constraints. Digital means of calibration have been suggested to correct opamp nonlinearity, relying on weakly nonlinear transfer functions with coefficients that may need a long time to measure accurately. Alternative types of ADCs that use no opamps, such as successive-approximation, time-domain, and comparator-based designs, have been gaining in popularity. In this paper we implement an inherently exact residue pipelining scheme that is not impaired by opamp gain and nonlinearity. Unlike other calibration methods that sort out errors after they occur, the proposed circuit performs no post analog or digital signal processing, as gain and nonlinearity errors are eliminated entirely at their very sources.
机译:在诸如ΔΣ调制器和流水线ADC等开关电容器电路中,无论运算放大器的增益和非线性如何,以采样数据形式准确地传输电压一直是模拟设计人员面临的最具挑战性的问题之一。迄今为止,由于增益和非线性约束,很难在低电压下使用流水线ADC来实现高分辨率。有人建议使用数字校准方法来校正运算放大器的非线性,它依赖于系数可能需要很长时间才能准确测量的弱非线性传递函数。不使用运算放大器的其他类型的ADC,例如逐次逼近,时域和基于比较器的设计,已经越来越流行。在本文中,我们实现了固有的精确残差流水线方案,该方案不受运算放大器增益和非线性的影响。与其他在错误发生后进行分类的校准方法不同,拟议的电路不执行后模拟或数字信号处理,因为增益和非线性误差在其源头被完全消除了。

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