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Toward Efficient Synthesis Method of Multifunctional Logic Circuits

机译:对多功能逻辑电路的高效合成方法

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The continuous effort how to achieve space-efficient implementation of a digital circuits may soon arrive at the physical limits behind the scaling of fundamental building components. One possible response to this problem can be recognized in adoption of so called multifunctional logic, which also comes with the intrinsically embedded reconfiguration features. Polymorphic electronics concept with its substantial technological independence opens a way to fulfil this objective through the adoption of emerging semiconductor technologies and advanced synthesis methods. This paper is dealing with a proposal of a novel synthesis method oriented on the exploitation of polymorphic electronics principles. Key part of it is based on Boolean divisor identification and function kernelling technique. Proposed method is evaluated with several test circuits.
机译:持续努力如何实现数字电路的空间高效实现可能很快就能达到基本建筑部件的缩放背后的物理限制。通过所谓的多功能逻辑采用,可以识别对此问题的一个可能的响应,这也具有本质上嵌入的重新配置功能。多态性电子理念与其大量技术独立性通过采用新兴的半导体技术和先进的合成方法开辟了一种履行这一目标的方法。本文正在处理对多态性电子原则开采的新型合成方法的提案。其关键部分是基于布尔除数识别和功能核心技术。用几个测试电路评估所提出的方法。

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