The simulation on diode-clamped five-level converters common-mode voltage suppression with zero-vector PWM strategy

摘要

More and more researchers have great concern on the issue of Common-mode voltage (CMV) in high voltage largepower converter. A novel common-mode voltage suppression scheme based on zero-vector PWM strategy (ZVPWM) ispresent in this paper. Taking a diode-clamped five-level converter as example, the principle of zero vector PWMcommon-mode voltage (ZCMVPWM) suppression method is studied in detail. ZCMVPWM suppression strategy isincluding four important parts, which are locating the sector of reference voltage vector, locating the small triangularsub-sector of reference voltage vector, reference vector synthesis, and calculating the operating time of vector. Theprinciples of four important pars are illustrated in detail and the corresponding MATLAB models are established. Systemsimulation and experimental results are provided. It gives some consultation value for the development and research ofmulti-level converters.© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.