The experiments show a gain of ETA, U_(OC) and J_(SC) and a draw back in FF due to higher serial resistance. The higher serial resistance can be reduced by optimized grid design. To reduce the parameter yield loss, caused by higher I_(REV2) in selective emitter cells, there are two options: Only material with a small amount of grain boundaries and dislocations should be used and the formation of a deeper and more homogenous emitter should be established. The behavior of selective emitter cells in the module is comparable to conventional cells.
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