首页> 外文会议>2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC) >Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming
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Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming

机译:通过重定时将流程序编译到基于暂存器的嵌入式多核处理器上

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The prevalence of stream applications in signal processing, multi-media, and network processing domains has resulted in a new trend of programming and architecture design. Several languages and multicore architectures have been developed to support streaming applications. In many of these multicore architectures scratchpad memories (SPM) have substituted caches due to their lower power consumption. Performance optimization on SPM based architectures requires the programmer/compiler to efficiently manage the limited local memory. Our paper addresses the problem of compilation of stream programs onto multicore architectures that incorporate SPMs. We propose a retiming technique that maximizes the throughput under a memory constraint with a user-specified number of software pipeline stages. Trade-offs between double buffering and code overlay are explored intensively in our technique to achieve the best performance. The efficiency of our technique was evaluated by compiling several stream applications for the IBM Cell BE and comparing their results against existing approaches.
机译:流应用在信号处理,多媒体和网络处理领域中的普遍使用导致了编程和架构设计的新趋势。已经开发了几种语言和多核体系结构来支持流应用程序。在许多这些多核体系结构中,暂存器(SPM)由于具有较低的功耗而替代了缓存。基于SPM的体系结构上的性能优化要求程序员/编译器有效地管理有限的本地内存。我们的论文解决了将流程序编译到包含SPM的多核体系结构上的问题。我们提出一种重定时技术,该技术可以在内存约束下以用户指定的软件流水线级数最大程度地提高吞吐量。为了获得最佳性能,我们在技术中深入研究了双缓冲和代码覆盖之间的取舍。通过为IBM Cell BE编译几个流应用程序并将它们的结果与现有方法进行比较来评估我们技术的效率。

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