Towards a chip scale neurostimulator: System architecture of a current-driven 98 channel neurostimulator via a two-wire interface

摘要

With more clinical trials proving viability of visual prosthesis follows the demand for higher resolution devices. As the number of electrodes increases, due to surgical difficulties, it is preferred to keep their length short by placing the implant close to the stimulation site, where there are considerable constraints on device size. On the contrary, the physical volume of the implant generally increases with increasing number of electrodes. Splitting the implant into two modules and placing only the essential circuits near the site of stimulation solves the aforementioned problem. However now the problem is redirected to the robustness and the safety of the interface joining these modules. A novel two-wire interface driving a 98 channel neurostimulator incorporating the split-architecture is presented. The stimulator is provided with both power and data by sending square current waveforms via the two-wire interface. The stimulator itself is fabricated using 0.35 μm HVCMOS technology and occupies 4.9 × 4.9 mm² and requires no external decoupling capacitor.