A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops

摘要

This paper addresses the problem of the stability and the performance analysis of N-nodes cartesian networks of self-sampled all digital phase-locked loops. It can be demonstrated that under certain conditions (such as proper filter coefficient values), a global and a local synchronization can be obtained. Our approach to find the optimal conditions consists of analyzing a corresponding linear average system of the cartesian network rather than constructing a piecewise-linear system which is extremely difficult to analyse. The constructed corresponding system takes into account the non-linearity of the network and especially the self-sampling property. It is then analyzed by linear performance criteria such as modulus margin to guarantee a robust stability of the cartesian network. The reliability of our approach is proved by transient simulations in networks of different sizes.