A Designed Experiment for the Influence of Copper Foils and Oxide Replacements on Impedance, DC Line Resistance and Insertion Loss

摘要

With ever increasing data transfer rates, insertion loss has become a limiting factor on today's systems. Insertion loss can be separated into dielectric loss and copper loss. While dielectric loss can be influenced by choosing a base material with the appropriate dissipation factor, copper loss is more complex. Copper loss is a function of bulk resistivity, cross sectional area of the conductor, conductor surface roughness as well as frequency. Conductor surface roughness is influenced by the copper foil type (STD, LP, VLP,...) and the oxide replacement process during PCB manufacturing. To better understand the contributing factors to copper loss, the influence of the copper foil roughness, 'as received' and 'modified by the oxide replacement' was evaluated. A DOE was performed with three different types of copper foils (RTF, VLP, ultra low profile) and ten different oxide replacement chemistries. Insertion loss as well as impedance and DC line resistance were measured on the various test samples. The results were compared using a statistical ANOVA approach. The paper describes the performed measurements and will discuss in detail the influence of copper foil, oxide replacement, line width and copper thickness on the key parameters impedance, DC line resistance and insertion loss. An 'analysis of variances process' is used to understand the level to which the contributing factors affect the electrical parameters. A measurement at two different frequencies is used to demonstrate the varying influence of the independent variables on insertion loss.