FPGA-based hardware design of real-time video de-interlacing

摘要

Interlacing is the important factor that result in declining video quality. In order to obtain a clear real-time video signal, it is necessary to deinterlacing before further processing. On this requirement, an motion adaptive de-interlacing and easy hardware implementation suggestion is proposed in this paper. Using a DDK SDRAM as frame buffer, mixing odd and even field through interlacing storing. Motion information is extracted by adaptive detection with the same polarity of 4 field. Then image is divided into static regions and moving regions. According to ELA, interpolation is made at moving regions. Design and simulation is made on the System Generator. The result show that such design is simple, efficient and conductive to hardware implementation.