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Charge loss in TANOS devices caused by Vt sensing measurements during retention

机译:保留期间Vt感应测量导致TANOS器件中的电荷损失

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摘要

In TANOS stuctures in retention, the major decrease in the programmed threshold voltage is found to be caused by the Vt sensing (IdVg measurements) rather than by intrinsic charge loss (when no bias is applied). This Vt decrease can be understood within the process of the temperature-activated charge transport through the Al2O3 blocking oxide. The charge loss can be minimized when Vt sensing time is decreased down to micro seconds. Blocking oxides engineered by adding a thin SiO2 layer at the SiN/AlO interface demonstrate significant suppression of the charge loss.
机译:在保留的TANOS结构中,发现编程阈值电压的大幅下降是由Vt感测(IdVg测量)引起的,而不是由于固有电荷损耗(未施加偏置时)引起的。在通过Al 2 O 3 阻挡氧化物的温度激活的电荷传输过程中,可以理解这种Vt降低。当Vt感测时间降低到微秒时,电荷损失可以最小化。通过在SiN / AlO界面上添加SiO 2 薄层设计的阻挡氧化物表现出对电荷损失的显着抑制。

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