首页> 外文会议>Quality Electronic Design (ISQED), 2010 >Coprocessor design space exploration using high level synthesis
【24h】

Coprocessor design space exploration using high level synthesis

机译:使用高级综合的协处理器设计空间探索

获取原文

摘要

Hardware/software co-design has been an area of research for a few decades. Currently co-design is utilized to create hardware coprocessors for compute intensive tasks of a system (which otherwise, performed in software, will not meet the performance goals). Design of correct hardware coprocessors with area, timing and power constraints is a time consuming task. In this paper, we present a methodology to alleviate this problem up to a certain extent. First, we show how to adopt a high-level synthesis tool in design space exploration to converge towards efficient hardware coprocessors. Second, we show, through a series of case studies that, a system-level approach, keeping platform specific optimizations in mind, can help in doing such an exploration efficiently.
机译:几十年来,硬件/软件协同设计一直是研究领域。当前,协同设计用于创建硬件协处理器,以计算系统的密集任务(否则,以软件执行,将无法达到性能目标)。设计具有面积,时序和功率约束的正确硬件协处理器是一项耗时的工作。在本文中,我们提出了一种在一定程度上缓解这一问题的方法。首先,我们展示如何在设计空间探索中采用高级综合工具,以融合为高效的硬件协处理器。其次,我们通过一系列案例研究表明,系统级方法(牢记特定于平台的优化)可以帮助有效地进行此类探索。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号