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Multiple-GHz ring and LC VCOs in 0.18 μm CMOS

机译:采用0.18μmCMOS的多GHz环形和LC VCO

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摘要

This work presents a comparison of the ring and LC VCOs to be used in multiple-GHz communication systems. Multiple-GHz CMOS ring and LC VCOs are implemented on the same chip and tested under similar conditions for a fair comparison. The prototype chip was fabricated using a 0.18 μm CMOS process and includes three-stage ring and symmetrical LC VCOs aimed for this comparison. The ring VCO dissipates 50 mW at an oscillation frequency of 6.1 GHz, and exhibits -97.5 dBc/Hz phase noise (@ 1 MHz). The LC VCO has a maximum frequency of 3 GHz with a 46% tuning range and has -111.4dBc/Hz phase noise (@1 MHz) while using 3.6 mW.
机译:这项工作提出了在多GHz通信系统中使用的环形和LC VCO的比较。多GHz CMOS环形和LC VCO在同一芯片上实现,并在相似的条件下进行测试以进行公平比较。该原型芯片使用0.18μmCMOS工艺制造,并包括三级环形和对称LC VCO,旨在进行比较。环形VCO在6.1 GHz的振荡频率下耗散50 mW,并表现出-97.5 dBc / Hz的相位噪声(@ 1 MHz)。 LC VCO的最高频率为3 GHz,调谐范围为46%,并且在使用3.6 mW时具有-111.4dBc / Hz的相位噪声(@ 1 MHz)。

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