A CMOS quad-band-ΣΔ-transceiver for GSM-EDGE with dual mode transmitter architecture for low noise and high linearity

摘要

A 120 nm CMOS quad-band transceiver for GSM EDGE with a dual mode transmitter architecture and a constant gain direct conversion receiver has been developed. In GMSK mode, a direct conversion transmitter with third order ΣΔ-modulation loop modulates the phase of the VCO. The output signal is amplified by a low noise power efficient limiting output buffer with 6 dBm output power. A high linearity vector modulator is switched on to process the 8-PSK modulated EDGE signal with additional amplitude modulation. Neither TX-SAW nor third harmonic filter are needed for system integration into a handset to fulfil the GSM-EDGE specification.