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A nearest-hamming-distance search memory with fully parallel mixed digital-analog match circuitry

机译:具有完全并行混合数模匹配电路的最近汉明距离搜索存储器

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A fully-parallel minimum Hamming-distance search memory has been designed, which uses digital circuitry for bit-comparison and fast analog circuitry for word-comparison as well as winner-take-all (WTA) functionality. The approach allows compact and high-performance integration in conventional CMOS technology. The 0.6μm, 2-poly, 3-metal CMOS design with 32 rows and 128 columns achieves 100ns search times at 260 mW power dissipation. The approach is extendable to increased pattern length and larger row numbers and enables high efficiency for pattern-matching applications such as network routers, code-book-based data compression, or object recognition. As for conventional memories high yield can be achieved with a redundancy concept for rows (including WTA function) and columns.
机译:设计了一种完全并行的最小汉明距离搜索存储器,该存储器使用数字电路进行位比较,并使用快速模拟电路进行字比较以及赢家通吃(WTA)功能。该方法允许在常规CMOS技术中进行紧凑且高性能的集成。具有32行和128列的0.6μm2聚3金属CMOS设计在<260 mW功耗下实现了<100ns的搜索时间。该方法可扩展到增加的模式长度和更大的行数,并为模式匹配应用(例如网络路由器,基于码本的数据压缩或对象识别)提供高效率。对于常规存储器,可以通过行(包括WTA功能)和列的冗余概念来实现高产量。

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