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Circuitry and method for controlling current surge on rails of parallel-pulldown-match-detect-type content addressable memory arrays
Circuitry and method for controlling current surge on rails of parallel-pulldown-match-detect-type content addressable memory arrays
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机译:用于控制并行下拉匹配检测类型的内容可寻址存储器阵列的轨道上的浪涌电流的电路和方法
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摘要
A content addressable memory system has an array of CAM cells. Each row of the array has a match line coupled to a match line pull device. The match line pull devices of each cell are also coupled to a row return line that may be shared with an adjacent row. Each row return line is coupled through a resistive device to a rail. The CAM cells also have a data memory element and comparison logic for comparing query data against the data memory element and controlling the match line pull devices.
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