CHIP-SCALE BALL GRID ARRAY PACKAGING FOR SURFACE MOUNT TECHNOLOGY

摘要

Chip-scale package families for silicon products as well as miniature discrete surface mount devices can be combined to help the engineer and designer meet the most demanding goals for electronic miniaturization. The significant advantage to employing the miniature chip-scale packaging (CSP) technology is threefold; higher component density, more efficient assembly automation and enhanced product performance. The following paper will focus on the chip-scale devices entering the market place, packaging alternatives, their compatibility with current circuit fabrication and surface mount assembly processes as well as the progress of standards for chip-scale and chip-size devices.