首页> 外文会议>IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering;TENCON'93 >A PARALLEL PLANAR LATTICE ARCHITECTURE FOR COMPETITIVELY INHIBITED NEURAL NETWORK SIMULATION
【24h】

A PARALLEL PLANAR LATTICE ARCHITECTURE FOR COMPETITIVELY INHIBITED NEURAL NETWORK SIMULATION

机译:竞争性抑制神经网络仿真的并行平面格构架

获取原文

摘要

Competitively inhibited neural network (CINN) appears to be promising in adaptive parameter estimation and pattern classification for its intelligent information processing potential. A neurocomputer of the parallel planar lattice architecture (PPLA) based on transputers for large scale, high speed simulations of the CINN is proposed in this paper. It has an even greater expandability of parallelism and exhibits sufficient flexibility to simulate the CINN of various network configurations and parameters.The experiments demonstrate that the performance of this neurocomputer is almost proportional to the number of processors by using a load balancing algorithm.
机译:竞争抑制神经网络(CINN)的智能信息处理潜力似乎在自适应参数估计和模式分类中很有前途。提出了一种基于晶片机的并行平面晶格结构(PPLA)神经计算机,用于CINN的大规模,高速仿真。它具有更大的并行性扩展能力,并具有足够的灵活性来模拟各种网络配置和参数的CINN。实验表明,通过使用负载平衡算法,该神经计算机的性能几乎与处理器数量成正比。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号