C-Testable CMOS Arrays using Charge/Discharge Techniques

摘要

In this paper, a technique is used for fault detection in C-testable two-dimensional unidirectional iterative arrays. The technique is based on the charge/discharge method and requires in addition a small modification of the basic cell structure. A single fault model based on permanent faults is assumed, but the condition that a faulty cell has to remain combinational is not required any more. Therefore, arrays implemented in the emerging (full) CMOS technology can be made C-testable.