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A preliminary architecture for a basic data-flow processor

机译:基本数据流处理器的初步架构

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A processor is described which can achieve highly parallel execution of programs represented in data-flow form. The language implemented incorporates conditional and iteration mechanisms, and the processor is a step toward a practical data-flow processor for a Fortran-level data-flow language. The processor has a unique architecture which avoids the problems of processor switching and memory/processor interconnecion that usually limit the degree of realizable concurrent processing. The architecture offers an unusual solution to the problem of structuring and managing a two-level memory system.
机译:描述了一种处理器,该处理器可以实现以数据流形式表示的程序的高度并行执行。实现的语言结合了条件和迭代机制,并且处理器是向Fortran级数据流语言的实用数据流处理器迈进的一步。处理器具有独特的体系结构,避免了通常会限制可实现的并发处理程度的处理器切换和内存/处理器互连的问题。该体系结构为结构化和管理两级存储系统的问题提供了一种不寻常的解决方案。

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