Epitaxial lead-chalcogenide on silicon layers for thermal imaging a

摘要

Abstract: Narrow gap Pb$-1$MIN@x$/Sn$-x$/Se and PbTe layers grown epitaxially on Si(111)-substrates by molecular beam epitaxy (MBE) exhibit high quality despite the large lattice and thermal expansion mismatch. A buffer layer of CaF$-2$/ is employed for compatibility. Due to easy glide of misfit dislocations in the lead chalcogenide layers, thermal strains relax even at cryogenic temperatures and after many temperature cycling. This is partly due to the NaCl- structure of lead salts and at variance to the zinkblende- type semiconductors. In addition, the high permittivity of lead chalcodenides which effectively shields the electric fields from charged defects makes the materials rather forgiving, i.e. higher quality devices are obtained from lower quality material, again at variance to Hg$-1$MIN@x$/Cd$-x$/Te or GaAs related compounds. Photovoltaic p-n or Schottky-barrier sensor arrays are delineated by using standard photolithography. At low temperatures, the ultimate sensitivities are presently limited by defects, mainly dislocations. At higher temperatures, the ultimate theoretical sensitivity have been obtained in Schottky barrier devices, this despite the large mismatch and only 3 $mu@m thickness of the layers. Due to the rather low temperatures used during the MBE and delineation, sensor arrays are obtained by postprocessing even on active Si-substrates. We describe ways to further improve device performance by lowering the dislocation densities in the lattice mismatched layers. This is achieved by temperature rampings, which drive out the threading dislocations from the active parts of the sensors. Presently, densities of 1 $MUL 10$+6$/ cm$+$MIN@2$/ in layers of a few micrometer thickness are obtained. These densities are sufficiently low in order not to dominate the leakage currents in real devices even at 80K temperatures. !23