首页> 外文会议> >VLSI architecture of Rayleigh fading simulator based on IIR filter and polyphase interpolator
【24h】

VLSI architecture of Rayleigh fading simulator based on IIR filter and polyphase interpolator

机译:基于IIR滤波器和多相内插器的瑞利衰落模拟器的VLSI架构

获取原文

摘要

This paper presents hardware design of a Rayleigh fading simulator that efficiently generates Gaussian variates with Jakes power spectral density. The architecture is based on Komninakis design consisting of a fixed IIR filter followed by a polyphase interpolator for different Doppler rates. The hardware simulator facilitates real time error performance evaluation of wireless channels in Rayleigh fading environments. It also offers the potential of improving the evaluation speed by orders of magnitude over a software based simulation.
机译:本文介绍了瑞利衰落模拟器的硬件设计,该模拟器可有效生成具有Jakes功率谱密度的高斯变量。该架构基于Komninakis设计,该设计包括一个固定的IIR滤波器和一个用于不同多普勒速率的多相内插器。硬件模拟器有助于在瑞利衰落环境中实时评估无线信道的错误性能。与基于软件的仿真相比,它还具有将评估速度提高几个数量级的潜力。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号