High-performance multiplexer-based logic synthesis using pass-transistor logic

摘要

An automatic logic/circuit synthesizer is developed which takes as input several Boolean functions and generates netlist output with basic composing cells from the pass-transistor cell library containing only two types of cells: 2-to-1 multiplexers and inverters. The synthesis procedure first constructs efficient binary decision diagrams (BDDs) for these Boolean functions considering both multi-function sharing and minimum width. Each node in the BDD trees can be realized by a 2-to-1 multiplexer (MUX) designed with pass-transistor logic. Then inverters are inserted along all the MUX paths in order to improve the speed performance and to alleviate the voltage-drop problem. Compared to the recently proposed pass-transistor based top-down design, our synthesizer has better speed and area performance due to the reduced number of cascaded inverters.