Cost-effective non-scan design for testability for actual testability improvement

摘要

A low-cost non-scan design for testability method is proposed, which is economical in pin, delay and area overheads. Unlike almost all of the previous non-scan design for testability methods which do not handle pin overhead well, our method allows a limited number of extra pins (3 or 5). A couple of effective techniques are presented to connect an extra input of a control test point to a primary input in order to avoid conflicts generated by the newly generated reconvergent fanouts. Techniques for extra control test points to share the same primary input are also presented. Sufficient experimental results are presented to demonstrate the effectiveness of the method.